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12 I
2
C (I2C)
Standby state (SCL = low)
TXSTART = 1
Saddr/W
→
TXD[7:0]
I
2
C bus
S
Saddr/W
TXSTART = 0
STARTIF = 1
TBEIF = 1
NACKIF = 1
NACKIF = 1
NACKIF = 1
Figure 12.
Data transmission
Write 1 to the I2CnCTL.TXSTART bit
Wait for an interrupt request
(I2CnINTF.TBEIF = 1)
Write slave address and WRITE (0) to
the I2CnTXD register
Wait for an interrupt request
(I2CnINTF.TBEIF = 1 or I2CnINTF.NACKIF = 1)
I2CnINTF.NACKIF = 1 ?
YES
YES
Retry?
No
Write 1 to the I2CnCTL.TXSTOP bit
Wait for an interrupt request
(I2CnINTF.STOPIF = 1)
End
12-6
Data 1
→
TXD[7:0]
Data 2
A
Data 1
A
TBEIF = 1
TBEIF = 1
TXSTOP = 1
A
P
TXSTOP = 0
STOPIF = 1
TXSTART = 1
A
Sr
TXSTART = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
A
P
S
TXSTART = 0
STARTIF = 1
TXSTOP = 0
TBEIF = 1
STOPIF = 1
4.2.1 Example of Data Sending Operations in Master Mode
NO
Last data sent?
Figure 12.
4.2.2 Master Mode Data Transmission Flowchart
Seiko epson Corporation
→
TXD[7:0]
Data N
Data 2
A
TBEIF = 1
Software bit operations
Operations by I2C (master mode)
S: START condition, Sr: Repeated START condition, P: STOP condition,
A: ACK, A: NACK, Saddr/W: Slave address + W(0), Data n: 8-bit data
YES
Write data to the I2CnTXD register
→
TXD[7:0]
TXSTOP = 1
Data N
A
P
TBEIF = 1
TXSTOP = 0
STOPIF = 1
TXSTART = 1
A
Sr
TBEIF = 1
TXSTART = 0
STARTIF = 1
TBEIF = 1
TXSTART = 1
TXSTOP = 1
A
P
S
TBEIF = 1
TXSTART = 0
STARTIF = 1
TXSTOP = 0
TBEIF = 1
STOPIF = 1
Hardware bit operations
Operations by the external slave
NO
S1C17F13 TeChniCal Manual
(Rev. 1.0)
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