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15 THEORETICAL REGULATION (TR)
Correction value
The correction value (-31/32,768 to +32/32,768 seconds) for theoretical regulation is specified using the
TRCTL.TRIM[5:0] bits.
Amount of correction/
TRCTL.TRIM[5:0]
one adjustment
bits
(n/32,768 seconds)
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2a
0x2b
0x2c
0x2d
0x2e
0x2f
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3a
0x3b
0x3c
0x3d
0x3e
0x3f
The correction value (0x00 to 0x3f) should be written to the Flash memory or read the switch settings via the
I/O ports and set it to the TRCTL.TRIM[5:0] bits.
Theoretical regulation operations
Writing 1 to the TRCTL.REGTRIG bit extends or reduces the cycle time of the 256 Hz clock output by the
OSC1A divider for the regulation value specified by the TRCTL.TRIM[5:0] bits. Theoretical regulation is per-
formed only once by writing 1 to the TRCTL.REGTRIG bit. To perform theoretical regulation periodically, use
a timer interrupt handler to write 1 to the TRCTL.REGTRIG bit.
The corrected 256 Hz clock (F256) will be supplied to the peripheral circuits that use the regulated clock.
Note: Use an interrupt from a timer that runs with the regulated clock (F256) to execute theoretical
regulation. An interrupt from the timer that runs all the time should be used to reduce current
consumption.
15-2
Table 15.
3.1.1 Correction Value Setting Example
Rate *
[seconds/day]
-31
+8.174
-30
+7.910
-29
+7.646
-28
+7.383
-27
+7.119
-26
+6.855
-25
+6.592
-24
+6.328
-23
+6.064
-22
+5.801
-21
+5.537
-20
+5.273
-19
+5.010
-18
+4.746
-17
+4.482
-16
+4.219
-15
+3.955
-14
+3.691
-13
+3.428
-12
+3.164
-11
+2.900
-10
+2.637
-9
+2.373
-8
+2.109
-7
+1.846
-6
+1.582
-5
+1.318
-4
+1.055
-3
+0.791
-2
+0.527
-1
+0.264
0
0
* Rates when theoretical regulation is executed in 10-second cycles
Seiko epson Corporation
Amount of correction/
TRCTL.TRIM[5:0]
one adjustment
bits
(n/32,768 seconds)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0a
0x0b
0x0c
0x0d
0x0e
0x0f
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1a
0x1b
0x1c
0x1d
0x1e
0x1f
(= -(n/32,768) × 6 [times/minute] × 60 [minutes] × 24 [hours])
Rate *
[seconds/day]
+1
-0.264
+2
-0.527
+3
-0.791
+4
-1.055
+5
-1.318
+6
-1.582
+7
-1.846
+8
-2.109
+9
-2.373
+10
-2.637
+11
-2.900
+12
-3.164
+13
-3.428
+14
-3.691
+15
-3.955
+16
-4.219
+17
-4.482
+18
-4.746
+19
-5.010
+20
-5.273
+21
-5.537
+22
-5.801
+23
-6.064
+24
-6.328
+25
-6.592
+26
-6.855
+27
-7.119
+28
-7.383
+29
-7.646
+30
-7.910
+31
-8.174
+32
-8.438
S1C17F13 TeChniCal Manual
(Rev. 1.0)
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