Data Reception In Master Mode - Epson S1C17F13 Technical Manual

11.5.3

Data Reception in Master Mode

A data receiving procedure and operations in master mode are shown below. Figures 11.5.3.1 and 11.5.3.2 show a
timing chart and flowcharts, respectively.
Data receiving procedure
1. Assert the slave select signal by controlling the general-purpose output port (if necessary).
2. Check to see if the SPInINTF.TBEIF bit is set to 1 (transmit buffer empty).
3. Write dummy data (or transmit data) to the SPInTXD register.
4. Wait for a transmit buffer empty interrupt (SPInINTF.TBEIF bit = 1).
5. Write dummy data (or transmit data) to the SPInTXD register.
6. Wait for a receive buffer full interrupt (SPInINTF.RBFIF bit = 1).
7. Read the received data from the SPInRXD register.
8. Repeat Steps 5 to 7 until the end of data reception.
9. Negate the slave select signal by controlling the general-purpose output port (if necessary).
Note: To perform continuous data reception without stopping SPICLKn, Steps 7 and 5 operations must
be completed within seven SPICLKn cycles after Step 6.
Data receiving operations
The SPI Ch.n starts data receiving operations simultaneously with data sending operations when transmit data
(may be dummy data if data transmission is not required) is written to the SPInTXD register.
The SPICLKn pin outputs eight clocks. The transmit data bits are output in sequence from the SDOn pin in
sync with this clock and the receive data bits input from the SDIn pin are shifted into the shift register.
When the eighth clock is output from the SPICLKn pin and 8-bit receive data is shifted into the shift register,
the received data is transferred to the receive data buffer and the SPInINTF.RBFIF bit is set to 1. At the same
time the SPI issues a receive buffer full interrupt request if the SPInINTE.RBFIE bit = 1. After that, the re-
ceived data in the receive data buffer can be read through the SPInRXD register.
Note: If 8-bit data is received when the SPInINTF.RBFIF bit is set to 1, the SPInRXD register is over-
written with the newly received 8-bit data and the previously received data is lost. There is no
flag provided for indicating a loss of data.
SPICLKn
SDOn
SDIn
SPInINTF.TBEIF
SPInINTF.RBFIF
SPInINTF.TENDIF
Software operations
Figure 11.
S1C17F13 TeChniCal Manual
(Rev. 1.0)
1 2 3 4 5 6 7 8
Data (W) → SPInTXD
SPInRXD → Data (R)
1 (W) → SPInINTF.TENDIF
5.3.1 Example of Data Receiving Operations in Master Mode
Seiko epson Corporation
11 SYNCHRONOUS SERIAL INTERFACE (SPI)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Data (W) → SPInTXD
Data (W) → SPInTXD
SPInRXD → Data (R)
SPInRXD → Data (R)
11-7