Operation - YASKAWA MP210 Series User Manual

• Details of slave status
bit 7 bit 6
SYNC SYNCRDY
Name Definition
0 Normal
WARNG
1 Warning
Command cannot be
0
received (busy)
CMDRDY
Command receivable
1
(ready)
0 Steady status
SBUSY
1 Transient status
Preparation for slave syn-
0
chronization incomplete
SYNCRDY
Ready for slave synchroni-
1
zation
0
Slave asynchronous status
SYNC
1 Slave synchronous status
Note: When a receive error occurs, the system registers "I/O Error Count" (SW00200) and "Input Error Count"
(SW00201) are incremented.
• Details of output data
Item
This is the 1-byte data area where the values set and refreshed by the application at the master
device are checked by the application at the slave devices. Its applications include the following.
• Confirming the refreshing of output data from the master device
Scan counter
• Judging the operation status (running/stopped) of the master device
Note that use of this area is optional and that data I/O processing can be executed without
refreshing scan counter values.
With M-II (17-byte), a data area of up to 6 words can be used, while with M-II (32-byte), a data
Data
area of up to 13 words can be used.
bit 5 bit 4
SBUSY 0
When a slave detects any of the following abnormalities this bit
comes ON. It goes OFF when the cause is eliminated.
• Receive error
• Unsupported command received
• Transmission cycle out of specified range
• Data error in received command
• Command execution conditions not satisfied
This bit is ON when processing for MECHATROLINK commands
is completed and it has become possible to receive the next com-
mand.
This bit is ON when slave CPU synchronization processing is being
executed.
This bit is ON when the execution conditions for slave CPU syn-
chronization have been satisfied. It is OFF in the following sta-
tuses.
• When the execution conditions for slave CPU synchronization
have not been satisfied
• When the control bit SLVSC has been turned ON at the
MP2100M
This bit is ON when the slave CPU synchronous status has been
established.
bit 3 bit 2 bit 1
CMDRDY WARNG
Explanation
Details
F.3 Operation
bit 0
0
F
F-11