Instruction Execution Timing; Instruction Timing List - Motorola MPC823e Reference Manual

SECTION 8

INSTRUCTION EXECUTION TIMING

This section describes the timing of the instruction cycles in terms of clock cycles, including
serialization, latency, and blockage.

8.1 INSTRUCTION TIMING LIST

The following table lists the instruction execution timing in terms of latency and blockage of
the appropriate execution unit. A serializing instruction has the effect of blocking all
execution units.
Table 8-1. Instruction Execution Timing
INSTRUCTIONS
Branch Instructions:
b, ba, bl, bla, bc, bca, bcl, bcla, bclr,
bclrl, bcctr, bcctl
System Call:
sc, rfi
CR Logical:
crand, crxor, cror, crnand, crnor,
crandc, creqv, crorc, mcrf
Fixed-Point Trap Instructions:
twi, tw
Move to Special Registers:
mtspr, mtcrf, mtmsr, mcrxr
Except mtspr to LR and CTR and
External to the Core Registers
Move to LR, CTR:
mtspr
Move to External to the Core
Special Registers:
mtspr, mttb, mttbu
Move from External to the Core
Special Registers:
mfspr, mftb, mftbu
Move from Special Registers
Located Internal to the Core:
1
mfspr
MOTOROLA
LATENCY BLOCKAGE
Taken 2 2
Not Taken 1 1
Serialize + 2 Serialize + 2
1 1
Taken Serialize + 3
Serialize + 3
Not Taken 1 1
Serialize + 1 Serialize + 1
1 1
8 Serialize + 1
Serialize + 1
Load Latency 1
1 1
MPC823e REFERENCE MANUAL
EXECUTION SERIALIZING
UNIT INSTRUCTION
Branch Unit No
— Yes
CR Unit No
ALU / BFU After
No
All Yes
Branch Unit No
LDST Yes
LDST No
— 2
See List
8-1