Motorola MPC823e Reference Manual page 84

Microprocessor for mobile computing
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Memory Map
Table 3-1. MPC823e Internal Memory Map (Continued)
INTERNAL
ADDRESS
9D0
RCTR3—RISC Controller Trap Register 3
9D2
RCTR4—RISC Controller Trap Register 4
9D4 to 9D5
RES—Reserved
9D6
RTER—RISC Timer Event Register
9D8 to 9D9
RES—Reserved
9DA to 9DB
RTMR—RISC Timer Mask Register
9DC to 9EF
RES—Reserved
BAUD RATE GENERATORS
9F0
BRGC1—BRG1 Configuration Register
9F4
BRGC2—BRG2 Configuration Register
9F8
BRGC3—BRG3 Configuration Register
9FC
BRGC4—BRG4 Configuration Register
UNIVERSAL SERIAL BUS
A00
USMOD—USB Mode Register
A01
USADR—USB Slave Address Register
A02
USCOM—USB Command Register
A03
RES—Reserved
A04
USEP0—USB Endooint Configuration 0 Register
A06
USEP1—USB Endooint Configuration 1 Register
A08
USEP2—USB Endooint Configuration 2 Register
A0A
USEP3—USB Endooint Configuration 3 Register
A0C to A0F
RES—Reserved
A10
USBER—USB Event Register
A12
RES—Reserved
A14
USBMR—USB Mask Register
A16
RES—Reserved
A17
USBS—USB Status Register
A18 to A1F
RES—Reserved
3-8
REGISTER
MPC823e REFERENCE MANUAL
SIZE
PAGE NUMBER
(IN BITS)
LOCATION
16
16
16
16-23
16
16-23
32
16-160
32
16-160
32
16-160
32
16-160
8
16-365
8
16-371
8
16-372
8
16
16-373
16
16-373
16
16-373
16
16-373
16
16-376
16
16
16-377
8
8
16-377
MOTOROLA

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