Table of Contents
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TABLE OF CONTENTS (Continued)
Paragraph
Number
4.1.4
External Soft Reset .................................................................... 4-4
4.1.5
Internal Soft Reset ..................................................................... 4-4
4.1.5.1
4.2
Reset Status Register ........................................................................... 4-5
4.3
How to Configure Reset ........................................................................ 4-7
4.3.1
Hard Reset ................................................................................. 4-7
4.3.1.1
4.3.2
Soft Reset ................................................................................ 4-12
5.1
Features ................................................................................................ 5-1
5.2
Register Model ...................................................................................... 5-3
5.2.1
System Clock and Reset Control Register ................................. 5-3
5.2.2
PLL, Low-Power, and Reset Control Register ........................... 5-7
5.3
The Clock Module ............................................................................... 5-10
5.3.1
On-Chip Oscillators and External Clock Input .......................... 5-12
5.3.2
System PLL .............................................................................. 5-12
5.3.2.1
5.3.3
The Low-Power Clock Divider .................................................. 5-14
5.3.4
Internal Clock Signals .............................................................. 5-16
5.3.4.1
5.3.4.2
5.3.4.3
5.3.4.4
5.3.5
Clock Configuration .................................................................. 5-22
5.3.5.1
5.3.5.2
5.4
Power Control ..................................................................................... 5-24
5.4.1
Power Rails .............................................................................. 5-24
5.4.2
Keep-Alive Power ..................................................................... 5-25
5.4.2.1
5.4.2.2
5.5
Low-Power Operation ......................................................................... 5-28
6.1
Features ................................................................................................ 6-1
6.2
Basic Structure of the Core ................................................................... 6-2
6.2.1
Instruction Flow Within the Core ................................................ 6-2
ii
Title
Debug Port Soft Reset .................................................... 4-4
Hard Reset Configuration Word ................................... 4-10
Section 5
SPLL Stability ............................................................... 5-13
The General System Clocks ......................................... 5-16
The Baud Rate Generator Clock .................................. 5-19
The Synchronization Clocks ......................................... 5-20
The LCD Clocks ........................................................... 5-21
Mode Clock Pins ........................................................... 5-22
The System Phase-Locked Loop Pins ......................... 5-23
Power Switching Example ............................................ 5-26
Register Lock ................................................................ 5-27
Section 6
MPC823e REFERENCE MANUAL
Page
Number
MOTOROLA
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