Motorola MPC823e Reference Manual page 202

Microprocessor for mobile computing
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WORD—Word Select
This field is used to select a word within a set and way.
Bits 30–31—Reserved
These bits are reserved and must be set to 0.
When read from the data array, the 32 bits of the word selected by the IC_ADR is placed in
the targeted general-purpose register. When read from the tag array, the 22 bits of the tag
and related information that is selected by the IC_ADR are all placed in the targeted
general-purpose register. The following table provides the bit layout of the instruction cache
data register when reading a tag.
IC_DAT (TAG READ FORMAT)
BIT
0
1
2
FIELD
RESET
R/W
SPR
BIT
16
17
18
FIELD
TAG
RESET
R/W
R/W
SPR
NOTE: — = Undefined.
TAG—Tag Select
This field contains the upper 22 bits of the address.
Bits 20-21 and 30-31—Reserved
These bits are reserved and must be set to 0.
V—Valid Entry
0 = Entry is not valid.
1 = Entry is valid.
L—Lock Entry
0 = Entry is unlocked.
1 = Entry is locked.
MOTOROLA
3
4
5
6
7
TAG
R/W
562
19
20
21
22
23
RES
V
L
R/W
R/W
R/W
562
MPC823e REFERENCE MANUAL
Instruction Cache
8
9
10
11
12
24
25
26
27
28
LRU
R
13
14
15
29
30
31
RES
R/W
9-13

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