Motorola MPC823e Reference Manual page 104

Microprocessor for mobile computing
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Clocks and Power Control
TBS—Timebase Source
This bit determines the clock source that drives the timebase and decrementer.
0 = Timebase frequency source is OSCCLK divided by 4 or 16.
1 = Timebase frequency source is GCLK2 divided by 16.
RTDIV—Real-Time Clock Divide
This bit indicates if the clock, the crystal oscillator or main clock oscillator, to the real-time
clock and periodic interrupt timer is divided by 4 or 512. At power-on reset this bit is cleared
if the MODCK1 and MODCK2 signals are low.
0 = The clock is divided by 4.
1 = The clock is divided by 512.
RTSEL—Real-Time Clock Select
This bit selects the crystal oscillator or main clock oscillator as the input source to the
real-time clock. At power-on reset, this bit reflects the value of the MODCK1 signal.
0 = The main clock oscillator is selected.
1 = The EXTCLK signal is selected.
CRQEN—CPM Request Enable
This bit is cleared by power-on or hard reset and specifies if the general system clock returns
to the high frequency while the communication processor module's RISC microcontroller is
active.
0 = The system remains in the lower frequency even if the communication processor
module is active.
1 = The system switches to high frequency when the communication processor
module is active.
PRQEN—Power Management Request Enable
This bit specifies whether or not the general system clock returns to a high frequency when
a pending interrupt from the interrupt controller or POW bit in the machine state register is
clear (normal mode). See Section 6.4.1.2.1 Machine State Register for more information.
This bit is cleared by power-on or hard reset.
0 = The system remains in low frequency even if there is a pending interrupt from the
interrupt controller or POW bit in the machine state register is cleared (normal
mode).
1 = The system switches to high frequency when there is a pending interrupt from the
interrupt controller or POW bit in the machine state register is cleared.
Bits 11–12 and 15–16—Reserved
These bits are reserved and must be set to 0.
5-4
MPC823e REFERENCE MANUAL
MOTOROLA

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