Setting Up External Reset Control Using Timer 5; Block Diagram Of External Reset Control Using Timer 5; Panasonic - Panasonic MN10285K User Manual

Timers
16-Bit Timer Setup Examples
Use the MOV instruction to set
this data and only use 16-bit
write operations.
This step stops the TM5BC
count and clears both TM5BC
and the S-R flip-flop to 0.
MN102H75K/F75K/85K/F85K LSI User Manual

4.11.10 Setting Up External Reset Control Using Timer 5

In this example, timer 5 is reset by an external signal while counting up.
P2
P6
TM5IC
P4
Timer 5
B /4
OSC
reset
TM5IC
Figure 4-52 Block Diagram of External Reset Control Using Timer 5
To set up timer 5:
1. Set the operating mode in the timer 5 mode register (TM5MD). Disable
timer 5 counting and interrupts. Select up counting. Since the TM5IC signal
will reset the counter asynchronously, set the TM5ECLR bit to 1. Select
B /4 as the clock source.
OSC
TM5MD (example)
Bit: 15 14 13 12
TM5 TM5 TM5
— —
EN NLD UD1
Setting: 0 0 0 0
2. Set the value to which timer 5 will loop (valid settings: x'0001' to x'FFFF').
For TM5BC to count from x'0000' to x'1FFF', for instance, write x'1FFF'
to TM5CA.
123

Panasonic

CORE
Interrupts Bus Controller
Timers 0-3
Timers 4-5
A. Chip Level
TM5BC
TM5CA
TM5CB
B. Block Level
11 10 9 8 7 6
TM5 TM5 TM5 TM5 TM5
UD0 TGE ONE MD1 MD0
0 0 0 0 0 0
Panasonic Semiconductor Development Company
ROM, RAM
P3
P5
Serial I/Fs
ADC
T Q
R
Q
S
T Q
x'00FE90'
5 4 3 2 1
TM5 TM5 TM5 TM5 TM5
ECLR LP ASEL S2 S1
1 1 0 0 1
0
TM5
S0
1