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Timers
16-Bit Timer Setup Examples
MN102H75K/F75K/85K/F85K LSI User Manual
Figure 4-30 below shows the output waveforms for TM4OA. Both A and B
interrupts can occur, but B interrupts can only occur if the TM4CB setting is from
0 to less than TM4CA. This is because when TM4CB
matches TM4CB.
Write to TM4MD
TM4EN
0
0
1
2
TM4BC
B
/4
OSC
CLRBC4
(1) TMCB = 4 (All 0s)
S4
R4
TM4OA
Interrupts
(2) TMCB = 2
S4
R4
TM4OA
Interrupts
(3) TMCB = FFFF (All 1s)
S4
R4
TM4OA
Interrupts
0s on first cycle, since
S4 has not gone high yet.
Figure 4-30 Single-Phase PWM Output Timing (Timer 4)
99
Panasonic
3
4
0
1
2
3
4
0
AB
AB
B
A
B
A
A
A
Panasonic Semiconductor Development Company
TM4CA, TM4BC never
1
2
3
4
0
1
2
3
AB
B
A
B
A
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