Panasonic Semiconductor Development Company
4.11.9 Setting Up an External Count Direction Controller
Using Timer 5
In this example, timer 5 counts B
direction (up or down). An interrupt occurs when the counter reaches a preset
value.
P2
P6
TM5IA
P4
Timer 5
B
/4
OSC
up/down
TM5IA
Figure 4-49 Block Diagram of External Count Direction Control Using Timer 5
Figure 4-50 Configuration Example of External Count Direction Control
120
Panasonic
16-Bit Timer Setup Examples
/4 and the TM5IA pin controls the count
OSC
CORE
ROM, RAM
Interrupts
Bus Controller
Timers 0-3
Serial I/Fs
Timers 4-5
ADC
A. Chip Level
TM5BC
TM5CA
T
R
S
Interrupt B
TM5CB
T
B. Block Level
TM5BC contents
0
x'1000'
x'1FFF'
Interrupt
Using Timer 5
MN102H75K/F75K/85K/F85K LSI User Manual
Timers
P3
P5
Q
Q
Q