Setting Up A Single-Phase Capture Input Using Timer 4; Block Diagram Of Single-Phase Capture Input Using Timer 4; Panasonic - Panasonic MN10285K User Manual

Use the MOV instruction for this
setup and only use 16-bit write
operations.
This step stops the TM4BC
count and clears both TM4BC
and the S-R flip-flop to 0.
Panasonic Semiconductor Development Company

4.11.4 Setting Up a Single-Phase Capture Input Using Timer 4

In this example, timer 4 is used to divide B
long the TM4IA input signal stays high. An interrupt occurs on capture B and the
software calculates the number of cycles by subtracting the contents of TMnCA
from the contents of TMnCB.
P3
P6
TM4IA
P2
Timer 4
B /4
OSC
up
TM4IA
Interrupt B
Figure 4-35 Block Diagram of Single-Phase Capture Input Using Timer 4
To set up timer 4:
1. Set the operating mode in the timer 4 mode register (TM4MD). Disable timer
4 counting and interrupts. Select up counting. Set the TM4NLP bit to 0 to
select looped counting from 0 to x'FFFF'. Select B
TM4MD (example)
Bit: 15 14 13 12
TM4 TM4 TM4
— —
EN NLD UD1
Setting: 0 0 0 0
2. Set the TM4NLD bit of the TM4MD register to 1 and the TM4EN bit to 0.
This enables TM4BC and the S-R flip-flop. This step ensures stable opera-
tion. If it is omitted, the binary counter may not count the first cycle. Do not
106

Panasonic

/4 by 65,536 and measure how
OSC
CORE ROM, RAM
Interrupts Bus Controller
Timers 0-3
Timers 4-5
A. Chip Level
TM4BC
TM4CA
TM4CB
B. Block Level
11 10 9 8 7 6
TM4 TM4 TM4 TM4 TM4
UD0 TGE ONE MD1 MD0
0 0 0 0 1 0
MN102H75K/F75K/85K/F85K LSI User Manual
Timers
16-Bit Timer Setup Examples
P4
P5
Serial I/Fs
ADC
T Q
R
Q
S
T Q
/4 as the clock source.
OSC
x'00FE80'
5 4 3 2 1
TM4 TM4 TM4 TM4 TM4
ECLR LP ASEL S2 S1
0 0 1 or 0 0 1
0
TM4
S0
1