Ir Remote Signal Receiver Control Registers; Ir Remote Signal Receiver Registers; Heama And 5-/6-Bit Data Pulse Widths; Panasonic - Panasonic MN10285K User Manual

Panax series microcomputer
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IR Remote Signal Receiver

IR Remote Signal Receiver Control Registers

The edge detection circuit samples
the remote signal with fSYSCLK.
Set the frequency divide-by ratio to
meet this condition. If you do not,
the microcontroller may interpret
the data 1s and 0s incorrectly.
After the program sets the divide-
by ratio for the frequency in
RMTC, the read values may be
incorrect until the circuit detects
the next active edge of the remote
signal.
MN102H75K/F75K/85K/F85K LSI User Manual
8.4
IR Remote Signal Receiver Control Regis-
ters
All registers in RMC block cannot be written by byte (by word only). Read by
byte is possible.
Table 8-5 IR Remote Signal Receiver Registers
Register
Address
RMTC
x'007EA4'
RMIR
x'007EA2'
RMIS
x'007EA0'
RMLD
x'007EAC'
RMCS
x'007EA6'
RMSR
x'007EA8'
RMTR
x'007EAA'
RMTC: Remote Signal Frequency Division Control Register
Bit:
7
6
5
4
RMTC7 RMTC6 RMTC5 RMTC4 RMTC3 RMTC2 RMTC1 RMTC0
Reset:
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
To identify the remote signal, the IR signal receiver generates a sampling
clock, T
, by dividing the PWM3 pulse by the value set in RMTC[7:0].
S
f
is f
PWM3
SYSCLK
tor). The T
cycle is the contents of RMTC + 1, so load a value from 1 to
S
255 for a division ratio from 2 to 256.
The microcontroller reads the value in the frequency division counter as a
ones' complement number (each digit is complemented).
Set the RMTC value so that T
input signal. Table 8-6 shows how to define T for the different formats.
Table 8-6 HEAMA and 5-/6-Bit Data Pulse Widths
Data 0:
HEAMA format
Data 1:
Data 0:
5-/6-bit format
Data 1:
RMTC is an 8- or 16-bit access register.
223

Panasonic

R/W
R/W
Remote signal frequency division control register
R/W
Remote signal interrupt control register
R/W
Remote signal interrupt status register
R/W
Remote signal leader value set register
R
Remote signal clock status register
R
Remote signal reception data shift register
R
Remote signal reception data transfer register
3
2
1
0
0
0
0
0
R/W
R/W
R/W
R/W
5
divided by 2
(= 375 kHz, 2.7 µs with a 4-MHz oscilla-
= T/2, where T is the pulse width of the remote
S
H
L
T
T
T
3T
2T
2T
2T
Panasonic Semiconductor Development Company
Function
x'007EA4'
6T

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