Panasonic MN10285K User Manual page 68

Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
VBIVWICL: VBIVSYNC (2) Interrupt Control Register (Low)
Bit: 7 6 5 4
VBIVW
— — —
IR
Reset: 0 0 0 0
R/W: R R R R/W
VBIVWICL detects and requests VBIVSYNC (2) interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
VBIVWIR: VBIVSYNC (2) interrupt request flag
0: No interrupt requested
1: Interrupt requested
VBIVWID: VBIVSYNC (2) interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
VBIVWICH: VBIVSYNC (2) Interrupt Control Register (High)
Bit: 7 6 5 4
— — — —
Reset: 0 0 0 0
R/W: R R R R
VBIVWICH enables VBIVSYNC (2) interrupts. It is an 8-bit access register.
Use the MOVB instruction to access it.
The priority level for VBIVSYNC (2) interrupts is written to the
VBIVLV[2:0] field of the VBIVICH register.
VBIVWIE: VBIVSYNC (2) interrupt enable flag
0: Disable
1: Enable
TM3UDICL: Timer 3 Underflow Interrupt Control Register (Low)
Bit: 7 6 5 4
TM3UD
— — —
IR
Reset: 0 0 0 0
R/W: R R R R/W
TM3UDICL detects and requests timer 3 underflow interrupts. It is an 8-
bit access register. Use the MOVB instruction to access it.
TM3UDIR: Timer 3 underflow interrupt request flag
0: No interrupt requested
1: Interrupt requested
TM3UDID: Timer 3 underflow interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
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3 2 1 0
VBIVW
— — —
ID
0 0 0 0
R R R R
3 2 1 0
VBIVW
— — —
IE
0 0 0 0
R R R R/W
3 2 1 0
TM3UD
— — —
ID
0 0 0 0
R R R R
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