Text Vertical Size Settings; Panasonic - Panasonic MN10285K User Manual

On-Screen Display
OSD Registers
MN102H75K/F75K/85K/F85K LSI User Manual
CIVSZ[1:0]: Text initial vertical size
Table 7-18 Text Vertical Size Settings
CIVSZ[1:0]
Setting Interlaced Displays
00
01
10
11
CIVP[9:0]: Text initial vertical position
EVOD: Display Start Field Control Register
Bit: 15 14 13 12
— — — —
Reset: 0 0 0 0
R/W: R R R R
EOSEL: Even/odd field select
0: Select the smaller counter value as the display start field
1: Select the larger counter value as the display start field
FRMON: Field register monitor
Monitors which field register (FREG) loaded the counter value on the
leading edge of VSYNC.
0: Loaded to FREG[23:20]
1: Loaded to FREG[13:10]
EOMON: Even/odd field monitor
Set between display fields.
0: No display start field detected
1: Display start field detected
FREG[23:20]: Field register
4-bit register 2 storing field counter value.
FREG[13:10]: Field register
4-bit register 1 storing field counter value.
HCOUNT: HSYNC count
Bit: 15 14 13 12
— — — —
Reset: 0 0 0 0
R/W: R R R R
This register holds the HSYNC count, which indicates the vertical display
position. It is cleared to 0 on the leading edge of VSYNC.
207

Panasonic

1 Dot Size
Progressive Displays
1 H scan line
2 H scan lines
4 H scan lines 2 H scan lines
6 H scan lines 3 H scan lines
11 10 9 8 7 6
EO FR EO FREG FREG
—
SEL MON MON 23 22
0 0 0 0 0 0
R R/W R R R R
11 10 9 8 7 6
HCNT HCNT HCNT HCNT
— —
9 8 7 6
0 0 0 0 0 0
R R R R R R
Panasonic Semiconductor Development Company
Reserved
1 H scan line
x'007F0E'
5 4 3 2 1
FREG FREG FREG FREG FREG
21 20 13 12 11
0 0 0 0 0
R R R R R
x'007F0C'
5 4 3 2 1
HCNT HCNT HCNT HCNT HCNT
5 4 3 2 1
0 0 0 0 0
R R R R R
0
FREG
10
0
R
0
HCNT
0
0
R