Panasonic MN10285K User Manual page 54

Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
IQ5ICL: External Interrupt 5 Interrupt Control Register (Low)
Bit: 7 6 5 4
— — — IQ5IR
Reset: 0 0 0 0
R/W: R R R R/W
IQ5ICL requests and verifies interrupt requests for external interrupt 5. It
is an 8-bit access register. Use the MOVB instruction to access it.
IQ5IR: External interrupt 5 interrupt request flag
0: No interrupt requested
1: Interrupt requested
IQ5ID: External interrupt 5 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
IQ5ICH: External Interrupt 5 Interrupt Control Register (High)
Bit: 7 6 5 4
— — — —
Reset: 0 0 0 0
R/W: R R R R
IQ5ICH enables external interrupt 5. It is an 8-bit access register. Use the
MOVB instruction to access it.
The priority level for external interrupt 5 is written to the IQ4LV[2:0] field
of the IQ4ICH register.
IQ5IE: External interrupt 5 interrupt enable flag
0: Disable
1: Enable
TM4CBICL: Timer 4 Compare/Capture B Interrupt Control Register (Low) x'00FC60'
Bit: 7 6 5 4
TM4CB
— — —
IR
Reset: 0 0 0 0
R/W: R R R R/W
TM4CBICL detects and requests timer 4 compare/capture B interrupts. It
is an 8-bit access register. Use the MOVB instruction to access it.
TM4CBIR: Timer 4 compare/capture B interrupt request flag
0: No interrupt requested
1: Interrupt requested
TM4CBID: Timer 4 compare/capture B interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
53
Panasonic
3 2 1 0
— — — IQ5ID
0 0 0 0
R R R R
3 2 1 0
— — — IQ5IE
0 0 0 0
R R R R/W
3 2 1 0
TM4CB
— — —
ID
0 0 0 0
R R R R
Panasonic Semiconductor Development Company
x'00FC5A'
x'00FC5B'