Interrupts
Interrupt Control Registers
MN102H75K/F75K/85K/F85K LSI User Manual
RMCICL: Remote Signal Receive Interrupt Control Register (Low)
Bit:
7
6
5
4
RMC
—
—
—
IR
Reset:
0
0
0
0
R/W:
R
R
R
R/W
RMCICL detects and requests remote signal receive interrupts. It is an 8-
bit access register. Use the MOVB instruction to access it.
RMCIR: Remote signal receive interrupt request flag
0: No interrupt requested
1: Interrupt requested
RMCID: Remote signal receive interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
RMCICH: Remote Signal Receive Interrupt Control Register (High)
Bit:
7
6
5
4
—
—
—
—
Reset:
0
0
0
0
R/W:
R
R
R
R
RMCICH enables remote signal receive interrupts. It is an 8-bit access regis-
ter. Use the MOVB instruction to access it.
The priority level for remote signal receive interrupts is written to the
TM2UDLV[2:0] field of the TM2UDICH register.
RMCIE: Remote signal receive interrupt enable flag
0: Disable
1: Enable
ADM3ICL: Address 3 Match Interrupt Control Register (Low)
Bit:
7
6
5
4
ADM3
—
—
—
IR
Reset:
0
0
0
0
R/W:
R
R
R
R/W
ADM3ICL detects and requests address match 3 interrupts. It is an 8-bit
access register. Use the MOVB instruction to access it.
ADM3IR: Address match 3 interrupt request flag
0: No interrupt requested
1: Interrupt requested
ADM3ID: Address match 3 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
61
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3
2
1
0
RMC
—
—
—
ID
0
0
0
0
R
R
R
R
3
2
1
0
RMC
—
—
—
IE
0
0
0
0
R
R
R
R/W
3
2
1
0
ADM3
—
—
—
ID
0
0
0
0
R
R
R
R
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