Table of Contents
Advertisement
Panasonic Semiconductor Development Company
8.3.4
Identifying the Data Format
The microcontroller determines the logic levels of the data by testing the interval
between remote signal edges. Table 8-1 shows the intervals that the microcon-
troller interprets as 0 and 1 for both HEAMA and 5-/6-bit formats. Table 8-2
shows the conditions for identifying long and short data.
Table 8-1 Logic Level Conditions for Data Formats
Operating Mode
HEAMA format
5-/6-bit format
Table 8-2 Long and Short Data Identification
Operating Mode
HEAMA format
5-/6-bit format
The 6-bit counter regulates data format detection. When the microcontroller detects
a data leader, it sets the LONGDF bit of the clock status register, RMCS, to indicate
long data. Figure 8-5 is a graphic representation of all the conditions for identifying
the data format.
When the microcontroller detects a data trailer, the hardware automatically
shuts off the supply to sampling clock T
The counter resets and the clock supply restarts at the next edge detection.
0
2 4 6
8 10 12
Leader
Data
Data = 0 (= 4 T
)
S
format
Data = 1 (= 8 T
detection
Short
Short/long
detection
Leader
Data
Data = 0 (= 8 T
)
S
format
detection
Short
Short/long
detection
0
4
8
Figure 8-5 Conditions for Detecting Data Formats
220
Panasonic
IR Remote Signal Receiver
IR Remote Signal Receiver Operation
Logic Level Conditions
Data = 0
< 6 T
cycles
S
< 12 T
cycles
S
Long Data
10 T
cycles
S
20 T
cycles
S
, which the 6-bit counter counts.
S
16
20
24
28
Leader (= 24 T
)
S
(When RMLD[3:0] = x'6')
)
S
Long
Leader (= 32 T
Data = 1 (= 16 T
)
S
Long
12
16
20
24
28
MN102H75K/F75K/85K/F85K LSI User Manual
Data = 1
6 T
cycles
S
12 T
cycles
S
Short Data
< 2 T
cycles
S
< 4 T
cycles
S
32
36
40
64 T
S
)
S
64 T
32
36
40
S
Advertisement
Table of Contents
