Toshiba DP120F Service Manual page 376

• PTC GA Signal Table
No. Signal Name
207 X32M
209-211 CD0-2AKX
212 PTCDAX
213 DSCDAK
214 PCIDAK
215 DMADE
217 MTINT
218 DLEINT
219 INT1284
221 LDSX
222 UDSX
225-230 A1-7
I: Input O: Output
March 2000 © TOSHIBA TEC
(7/7)
Type
I System clock input (32.0000MHz)
I CODEC DMA interface 0-2 signals (active-low)
DMAC GA (IC16) enables DMA transfer with CODEC
(IC51).
I PTC DMA acknowledge signal
DMAC GA enables DMA transfe.
I DSC DMA acknowledge signal
DMAC GA enables DMA transfer with DSC (IC59).
I PC I/F DMA acknowledge signal
DMAC GA enables DMA transfer with the PC inter-
face.
I DMA data enable signal
Indicates that DMAC GA is to perform DMA transfer.
O Motor interrupt signal
Outputs the motor interrupt signal to DMAC GA.
(Interrupt level 6)
O DLE interrupt signal
Outputs the interrupt signal of the PC interface to
DMAC GA.
(Interrupt level 3)
O 1284 interrupt signal
Outputs the interrupt signal of the PC interface to
DMAC GA.
(Interrupt level 3)
I Lower data strobe signal (active-low)
Causes the lower data bus data to be latched.
I Upper data strobe signal (active-low)
Causes the upper data bus data to be latched.
I Address bus
I/O: Bidirectional
Functions
7-67 DP120F/DP125F Circuit Description