Toshiba DP120F Service Manual page 338

The memory circuit consists of the memories for storing data, including the Flash ROM, SRAM
and DRAM, CPU (IC66) for read/write control, and DMAC GA (IC16).
IC13 and IC20 are 8M-bit Flash ROM's in which system programs are stored. Data communi-
cation is carried out on the data bus (D0-15) and address bus (A1-19).
IC21 is a 4M-bit Flash ROM in which user setting information such as dial and function settings
is stored. Data communication is carried out on the data bus (D0-15) and address bus (A1-19).
IC30 and IC31 are 256K-bit SRAM's and used for storing user setting information and IC21
data management. These SRAM's are backed up by the lithium battery. Data communication
is carried out on the data bus (D0-15) and address bus (A1-15).
IC34 and IC41 (installed on the DP120F only) are 16M-bit DRAM's and used for storing image
data and as a CPU work memory and a transmit/receive data buffer. These DRAM's are
backed up by the nickel-hydrogen battery. Data communication is carried out on the system
data bus (SD0-15) and system address bus (SDA0-9). Note that these ICs are specified as
SYS-DRAM in the description of this chapter.
IC46 (installed on the DP125F only) is a 64M-bit DRAM and used for storing image data and as
a CPU work memory and a send/receive data buffer. This DRAM is backed up by the nickel-
hydrogen battery. Data communication is carried out on the system data bus (SD0-15) and
system address bus (SDA0-9). Note that this IC is specified as SYS-DRAM in the description of
this chapter.
IC25 is a 64M-bit DRAM and used for a page memory and as a PC/scan/CODEC data buffer.
Data communication is carried out on the PIX data bus (PIXD0-15) and PIX address bus (PDA0-
11). Note that this IC is specified as PIX-DRAM in the description of this chapter.
IC56 and IC57 are 256K-bit SRAM's and used as work memories for the CODEC (IC51). Data
communication is carried out on the CODEC work data bus (ALD0-7, RD0-7) and CODEC work
data bus (RA0-14).
Signal Name Type
D0-15 I/O
A1-19 I
SD0-15 I/O
SDA0-9 I
PXD0-15 I/O
PDA0-11 I
ALD0-7, I/O
RD0-7
RA0-14 I
March 2000 © TOSHIBA TEC
Active
- Data Bus
- Address Bus
- System Data Bus
- System Address Bus
- PIX Data Bus
- PIX Address Bus
- CODEC-WORK-ONLY Data Bus
- CODEC-WORK-ONLY Address Bus
Description
7-29
Destination
CPU
CPU
Gate(IC42)
DMAC GA
DMAC GA
DMAC GA
CODEC
CODEC
DP120F/DP125F Circuit Description