Miscellaneous; Nops - Intel ARCHITECTURE IA-32 Reference Manual

Architecture optimization
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User/Source Coding Rule 19. (M impact, ML generality) Avoid the use of
conditional branches inside loops and consider using SSE instructions to
eliminate branches.
User/Source Coding Rule 20. (M impact, ML generality) Keep induction
(loop) variables expressions simple.

Miscellaneous

This section explains separate guidelines that do not belong to any
category described above.

NOPs

Code generators generate a no-operation (NOP) to align instructions.
The NOPs are recommended for the following operations:
1-byte:
2-byte:
3-byte:
6-byte:
These are all true NOPs, having no effect on the state of the machine
except to advance the EIP. Because NOPs require hardware resources to
decode and execute, use the least number of NOPs to achieve the
desired padding.
The one byte NOP,
Although it still consumes a
dependence upon the old value of
can be executed at the earliest possible opportunity, reducing the
number of outstanding instructions. This is the lowest cost NOP
possible.
,
xchg EAX
EAX
,
mov reg
reg
, 0 (
) (8-bit displacement)
lea reg
reg
, 0 (
) (32-bit displacement)
lea reg
reg
,
xchg EAX
EAX
μ
op and its accompanying resources, the
General Optimization Guidelines
, has special hardware support.
is removed. Therefore, this
EAX
2
μ
op
2-95

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