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IA-32 Intel® Architecture Optimization
Table C-5
Streaming SIMD Extension 64-bit Integer Instructions
Instruction
CPUID
PAVGB/PAVGW mm, mm
PEXTRW r32, mm, imm8
PINSRW mm, r32, imm8
PMAX mm, mm
PMIN mm, mm
3
PMOVMSKB
r32, mm
3
PMULHUW
mm, mm
PSADBW mm, mm
PSHUFW mm, mm, imm8
See "Table Footnotes"
Table C-6
MMX Technology 64-bit Instructions
Instruction
CPUID
MOVD mm, r32
3
MOVD
r32, mm
MOVQ mm, mm
PACKSSWB/PACKSSD
W/PACKUSWB mm, mm
PADDB/PADDW/PADDD
mm, mm
PADDSB/PADDSW
/PADDUSB/PADDUSW
mm, mm
PAND mm, mm
PANDN mm, mm
PCMPEQB/PCMPEQD
PCMPEQW mm, mm
C-14
1
Latency
0F3n
0F2n
0x69n
2
2
7
7
2
4
4
1
2
2
2
2
7
7
1
9
8
4
4
5
2
2
1
1
Latency
0F3n
0F2n
0x69n
2
2
5
5
6
6
2
2
2
2
2
2
2
2
2
2
2
2
Throughput
0F3n
0F2n
0x69n 0F2n
1
1
2
2
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
2
1
1
1
Throughput
0f3n
0F2n
0x69n 0F2n
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Execution Unit
MMX_ALU
MMX_SHFT,
FP_MISC
MMX_SHFT,
MMX_MISC
MMX_ALU
MMX_ALU
FP_MISC
FP_MUL
MMX_ALU
MMX_SHFT
2
Execution Unit
MMX_ALU
FP_MISC
FP_MOV
MMX_SHFT
MMX_ALU
MMX_ALU
MMX_ALU
MMX_ALU
MMX_ALU
continued
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