Intel ARCHITECTURE IA-32 Reference Manual page 474

Architecture optimization
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IA-32 Intel® Architecture Optimization
Table B-1
Pentium 4 Processor Performance Metrics (continued)
Metric
Mispredicted
returns
All conditionals
Mispredicted
indirect
branches
Mispredicted
calls
Mispredicted
conditionals
Trace Cache (TC) and Front-End Metrics
Page Walk Miss
ITLB
ITLB Misses
B-20
Description
The number of
mispredicted returns
including all causes.
The number of
branches that are
conditional jumps
(may overcount if the
branch is from build
mode or there is a
machine clear near
the branch)
All Mispredicted
returns and indirect
calls and indirect
jumps
All Mispredicted
indirect calls
The number of
mispredicted
branches that are
conditional jumps
The number of page
walk requests due to
ITLB misses.
The number of ITLB
lookups that resulted
in a miss. Page Walk
Miss ITLB.is less
speculative than
ITLB Misses and is
the recommended
alternative.
Event Name or Metric
Expression
retired_mispred_
branch_type
retired_branch_type
retired_mispred_
branch_type
retired_branch_type
retired_mispred_
branch_type
page_walk_type
ITLB_reference
Event Mask Value
Required
RETURN
CONDITIONAL
INDIRECT
CALL
CONDITIONAL
ITMISS
MISS
continued

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