Intel ARCHITECTURE IA-32 Reference Manual page 62

Architecture optimization
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IA-32 Intel® Architecture Optimization
The two logical processors each have a complete set of architectural
registers while sharing one single physical processor's resources. By
maintaining the architecture state of two processors, an HT Technology
capable processor looks like two processors to software, including
operating system and application code.
By sharing resources needed for peak demands between two logical
processors, HT Technology is well suited for multiprocessor systems to
provide an additional performance boost in throughput when compared
to traditional MP systems.
Figure 1-6 shows a typical bus-based symmetric multiprocessor (SMP)
based on processors supporting Hyper-Threading Technology. Each
logical processor can execute a software thread, allowing a maximum of
two software threads to execute simultaneously on one physical
processor. The two software threads execute simultaneously, meaning
that in the same clock cycle an "add" operation from logical processor 0
and another "add" operation and load from logical processor 1 can be
executed simultaneously by the execution engine.
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