Figure 6-6 Cache Blocking - Temporally Adjacent And Non-Adjacent Passes - Intel ARCHITECTURE IA-32 Reference Manual

Architecture optimization
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Figure 6-6 Cache Blocking – Temporally Adjacent and Non-adjacent Passes
In the temporally-adjacent scenario, subsequent passes use the same
data and find it already in second-level cache. Prefetch issues aside, this
is the preferred situation. In the temporally non-adjacent scenario, data
used in pass m is displaced by pass (m+1), requiring data re-fetch into
the
first level cache
reuses the data. If both data sets fit into the second-level cache, load
operations in passes 3 and 4 become less expensive.
Dataset A
Dataset A
Dataset B
Dataset B
Temporally
adjacent passes
and perhaps the second level cache if a later pass
Optimizing Cache Usage
Pass 1
Dataset A
Pass 2
Dataset B
Pass 3
Dataset A
Dataset B
Pass 4
Temporally
non-adjacent
passes
6
6-35

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