Example 4-8 Pinsrw Instruction Code; Figure 4-6 Pinsrw Instruction - Intel ARCHITECTURE IA-32 Reference Manual

Architecture optimization
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Figure 4-6 pinsrw Instruction

Example 4-8
pinsrw Instruction Code
; Input:
;
; Output:
;
;
mov
pinsrw mm0, eax, 1
If all of the operands in a register are being replaced by a series of
instructions, it can be useful to clear the content and break the
pinsrw
dependence chain by either using the
register. See the "Clearing Registers" section in Chapter 2.
63
X4
edx
pointer to source value
mm0
register with new 16-bit value inserted
eax, [edx]
Optimizing for SIMD Integer Applications
MM
31
X3
Y1
X1
R32
31
Y2
Y1
OM15164
instruction or loading the
pxor
0
0
4-15
4

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