The Lfence Instruction; The Mfence Instruction - Intel ARCHITECTURE IA-32 Reference Manual

IA-32 Intel® Architecture Optimization
The degree to which a consumer of data knows that the data is
weakly-ordered can vary for these cases. As a result, the
instruction should be used to ensure ordering between routines that
produce weakly-ordered data and routines that consume this data. The
sfence
the ordering when every
fence
instruction which follows the

The lfence Instruction

The
lfence
instruction that precedes the
globally visible before any
The
lfence
instructions from other loads.

The mfence Instruction

The
mfence
and
load
program order to be globally visible before any other
instruction that follows the
means of segregating certain memory instructions from other memory
references.
Note that the use of a
of a
mfence
to each other. In other words, the load fence can be executed before
prior stores, and the store fence can be executed before prior loads. The
mfence
instruction (
references generated by the processor do not interfere with the flush; see
"The clflush Instruction" for more information.
6-16
instruction provides a performance-efficient way by ensuring
instruction in program order is globally visible before any
(
load fence
instruction provides a means of segregating certain load
(
memory fence
instruction that precedes the
store
lfence
since the load and store fences are not ordered with respect
instruction should be used whenever the cache line flush
) is used to ensure that speculative memory
clflush
instruction that precedes the
store
.
fence
) instruction makes it possible for every
instruction in program order to be
lfence
instruction that follows the
load
) instruction makes it possible for every
. The
mfence mfence
and
sfence
sfence
store
lfence
instruction in
mfence
or
load
instruction provides a
is not equivalent to the use
store
load
.
store