Move Byte Mask To Integer; Example 4-9 Repeated Pinsrw Instruction Code - Intel ARCHITECTURE IA-32 Reference Manual

Architecture optimization
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IA-32 Intel® Architecture Optimization
Example 4-9
Repeated pinsrw Instruction Code
; Input:
;
edx
;
;
; Output:
;
MMX
;
pxor
mm0, mm0
mov
eax, [edx]
pinsrw
mm0, eax, 0
mov
eax, [edx+10]
pinsrw
mm0, eax, 1
mov
eax, [edx+13]
pinsrw
mm0, eax, 2
mov
eax, [edx+24]
pinsrw
mm0, eax, 3

Move Byte Mask to Integer

The
pmovmskb
significant bits of each byte of its source operand. When used with the
64-bit MMX registers, this produces an 8-bit mask, zeroing out the
upper 24 bits in the destination register. When used with the 128-bit
XMM registers, it produces a 16-bit mask, zeroing out the upper 16 bits
in the destination register. The 64-bit version is shown in Figure 4-7 and
Example 4-10.
4-16
pointer to structure containing source
values at offsets: of +0, +10, +13, and +24
immediate value: "1"
register with new 16-bit value inserted
; Breaks dependedncy on previous value of mm0
instruction returns a bit mask formed from the most

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