Intel ARCHITECTURE IA-32 Reference Manual page 275

CAUTION.
previous computations because the
instructions bypass one part of the register. The same
issue can occur with the use of an exclusive-OR
function within an inner loop in order to clear a
register:
xorps xmm0, xmm0
Although the generated result of all zeros does not depend on the
specific data contained in the source operand (that is,
with itself always produces all zeros), the instruction cannot execute
until the instruction that generates
case, this creates a dependence chain that links successive iterations of
the loop, even if those iterations are otherwise independent. The
performance impact can be significant depending on how many other
independent intra-loop computations are performed. Note that on the
Pentium 4 processor, the SIMD integer
the same register, do break the dependence chain, eliminating false
dependencies when clearing registers.
The same situation can occur for the above
sequence. Since each
destination register, the instruction cannot execute until the prior
instruction that generates this register has completed. As with the
example, in the worst case this dependence can prevent successive loop
iterations from executing in parallel.
A solution is to include a 128-bit load (that is, from a dummy local
variable, such as
tmp
/ instruction. This action effectively breaks the
movhps movlps
dependence by performing an independent load from a memory or
cached location.
Optimizing for SIMD Floating-point Applications
Avoid creating a dependence chain from
; All 0's written to xmm0
has completed. In the worst
xmm0
pxor
/ instruction bypasses part of the
movhps movlps
in Example 5-4) to each register to be used with a
/
movhps movlps
of a register
XOR
instructions, if used with
/ /
movhps movlps shufps
5
xorps
5-13