Table B-2 Metrics That Utilize Replay Tagging Mechanism - Intel ARCHITECTURE IA-32 Reference Manual

Table B-2 Metrics That Utilize Replay Tagging Mechanism
Replay Metric Tags
1stL_cache_load_
miss_retired
2ndL_cache_load_
miss_retired
DTLB_load_miss_
retired
DTLB_store_miss_
retired
DTLB_all_miss_
retired
Tagged_mispred_
branch
MOB_load_
replay_retired
Split_load_
retired
Split_store_
retired
1. Certain kinds of μops cannot be tagged. These include I/O operations, UC and locked accesses, returns, and far
transfers.
Bit field
to set:
Bit field to
MSR_
set:
PEBS_
IA32_PEBS_ MATRIX_
1
ENABLE VERT
Bit 0, BIT 24, Bit 0
BIT 25
Bit 1, BIT 24, Bit 0
BIT 25
Bit 2, BIT 24, Bit 0
BIT 25
Bit 2, BIT 24, Bit 1
BIT 25
Bit 2, BIT 24, Bit 0, Bit 1
BIT 25
Bit 15, Bit 16, Bit 4
Bit 24, Bit 25
Bit 9, BIT 24, Bit 0
BIT 25
Bit 10, BIT Bit 0
24, BIT 25
Bit 10, BIT Bit 1
24, BIT 25
Using Performance Monitoring Events
Additional MSR
None
None
None
None
None
None
Select MOB_load_
replay and set the
PARTIAL_DATA and
UNALGN_ADDR bits
Select
Load_port_replay
event on
SAAT_CR_ESCR1 and
set SPLIT_LD bit
Select Store_port_
replay event on
SAAT_CR_ESCR0 and
set SPLIT_ST bit
B
See Event
Mask
Parameter
for
Replay_
event
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B-47