Error/Event Queue (Err); Questionable Status Register Summary (Qsr); Message Available (Mav); Standard Event Status Summary (Esb) - Xantrex XDC 10-1200 Operating Manual

Remote Operation

Table 4-21 Status Byte Summary Register

Bit Bit Weight
0 1
1 2
2 4
3 8
4 16
5 32
6 64
7 128

Error/Event Queue (ERR)

This bit it TRUE if any errors are present in the Error/Event Queue.

Questionable Status Register Summary (QSR)

This bit is TRUE when a bit in the Questionable Event Status Register is set and
its corresponding bit in the Questionable Status Enable Register is TRUE.

Message Available (MAV)

This bit is TRUE whenever the power supply is ready to accept a request by the
Digital Programming Interface to output data bytes. This message is FALSE when
the output queue is empty.

Standard Event Status Summary (ESB)

This bit is TRUE when a bit is set in the Standard Event Status Register.

Master Summary Status (MSS)

This is caused by one of the following:
•
•
•
4–56
Bit Name
Reserved
Reserved
Error/Event Queue (ERR)
Questionable Status
Register (QSR)
Message Available (MAV)
Standard Event Status Bit
Summary (ESB)
Request Service (RQS)
Master Status Summary
(MSS)
Operation Status Register
(OSR)
Status Byte bit 0 AND Service Request Enable Register bit 0
Status Byte bit 1 AND Service Request Enable Register bit 1
Status Byte bit 2 AND Service Request Enable Register bit 2
Description
Set if any errors are present in the Error/Event queue.
Set if any bits are set in the Questionable Status Event
register.
Indicates whether the output queue is empty. MAV is
TRUE if the device is ready to accept a request from the
controller.
A summary of the Standard Event Status Register.
MSS indicates that the device has at least one reason for
requesting service.
Present if a bit is set in the Operation status register.
TM-XDOP-01XN