Preliminary Technical Data
The frequency information comes from the BBIC. Before each Tx or Rx setup, we expect to get some message (this may come in various
forms which is discussed later in the document) which indicates a frequency. Prior to each hop, the channel (Tx or Rx) information and
the frequency information are obtained.
The table in blue indicates the frames on the air. This shows one frame delay, which is required for all the setup information (frequency
and channel). This gives the time for PLL to be retuned and channel to be set up before bringing the data frame on the air.
The hop frame consists of the transition time and dwell time. Transition time (shown as a black box) is the allowed setup time before the
actual frame starts. Dwell time (actual Tx or Rx frame) is the time at which the actual frame starts and operates in that specific frequency.
In this example, each frame works on a different frequency from F1 to F4, and two LOs are being used.
FRAMEWORK
This section briefly describes the interaction of different hardware components both internally and externally with BBIC to achieve
frequency hopping, specifically ADRV9001 ARM, Stream processor, DMA, and BBIC. Note DMA is an internal component for quick
memory access. DMA and stream processor are used internally and do not require user interaction. We mention these only for a more
complete description of how different components work together for ADRV9001. From the user point of view, everything should work
seamlessly.
ARM accepts the communication from the BBIC. During setup time, ARM is going to generate DMA tables to program the PLL and at
hop time these tables can be triggered by stream processor to program the PLL.
Stream processor responds to the signals (Hop signal, Tx setup, and Rx setup) in a deterministic manner so that when a hop signal comes
in from BBIC, the analog and digital components can be properly set up.
DMA allows the ARM to update it before each hop frame so that it can configure the PLL to a new frequency. At hop time, the stream
processor enables the DMA.
CHANNEL USE CASES
Depending on the user's application, the channel can be configured in two ways, TRX and TX only and Rx only. If the propagation delay
is less than the allowed hop duration length, then the user can choose either mode. However, for the case that propagation delay is longer
than the hop duration, only Tx only or Rx only can be supported. The propagation delay parameter, in this case, needs to be set up
properly to guarantee that the data is ready at the antenna at the right time.
Table 31. Channel Use Cases and Timing Considerations
Channel Use Case
Timing Considerations
TRX
Supports profiles where propagation delay and setup time are within the allowed hop duration of the frequency
hopping mode.
Does not support profiles where the propagation delay is greater than the allowed hop duration.
TX Only and RX
Supports profiles where propagation delay and setup time are within the allowed hop duration of the frequency
only
hopping mode.
Supports profiles where the propagation delay is greater than the allowed hop duration.
FREQUENCY TABLE INDEXING
The user has the option of providing a frequency hopping table before the system bootup. Besides the frequency table, there are other
ways to provide frequency information, which is discussed later in this document. If the user wants to provide a frequency table, we have
three selection modes for indexing a frequency table: PIN, API, and AUTO modes.
In PIN mode, DGPIO pins can be utilized by user to indicate a frequency index. 6 DGPIO pins can be used to indicate a max of 64
frequencies in the frequency table and 3 DGPIO pins can be used to indicate a max of 8 gain levels. Note the frequencies do not need to
be in order.
API mode works similarly, instead of DGPIO pins, two 8-bit registers can be used to provide a frequency and gain index. The user just
needs to provide the frequency and gain index and API call are used to write the frequency and gain values in the hardware.
Rev. PrA | Page 85 of 253
UG-1828
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