Multichip Synchronization - Analog Devices ADRV9001 User Manual

UG-1828
Table 28. Supported Data Lane Rate By LP CLKPLL
Standard
DMR/P25 Direct Modulation
P25 Direct Modulation
FM Direct Modulation
DMR I/Q
FM Direct Modulation
TETRA
TETRA
LTE 1.5
LTE 3
LTE 5
LTE 10
LTE 15
LTE 20
LTE 40 @12 bits

MULTICHIP SYNCHRONIZATION

Systems with MIMO configuration, where multiple ADRV900x devices are used to implement multiple inputs and outputs channels,
require a common device clock (DEV_CLK) and synchronization signal (MCS).
Figure 71 illustrates the synchronization between multiple ADRV900x devices using a shared input pin, MCS. The MCS signal is
generated by the external clock chip (for example, AD9528) using device clock DEV_CLK and captured by each ADRV900x device using
negative or positive edge of DEV_CLK to meet setup and hold time with good margins. Each ADRV900x device uses this sampled MCS
to synchronize all internally generated clocks which make them aligned between all devices internal clocks.
To use MCS for clock synchronization, multiple MCS pulses are required to sequentially synchronize clock dividers inside ADRV900x
devices, 4 for analog clock divider synchronization, 2 for digital clock divider synchronization. Figure 72 illustrates MCS pulse sequence
for MCS synchronization. The MCS pulse width has be at least one device clock (DEV_CLK) cycle. The wait times between MCS pulses
are TBD.
After multiple ADRV900x devices are synchronized, it is possible to perform digital clock divider synchronization only, without
resynchronizing analog clock dividers, that is, after the initial four analog MCS pulses, all remaining MCS pulses go straight to the digital
with affecting the state of synchronization of analog circuitry.
Serialization Factor Per Data Lane
2
2
16
32
8
16
16
32
8
16
32
8
16
32
8
16
8
16
8
16
16
16
16
12
Rev. PrA | Page 76 of 253
Preliminary Technical Data
Data Lane Rate
9.60E +03
1.20E +04
1.28E +05
7.68E + 05
1.92E + 05
3.84E + 05
1.54E + 06
4.61E + 06
1.15E + 06
2.30E + 06
9.22E + 06
2.30E + 06
4.61E + 06
6.14E + 07
1.54E + 07
3.07E + 07
3.07E + 07
6.14E + 07
6.14E + 07
1.23E + 08
2.46E + 08
3.69E + 08
4.92E + 08
7.37E +08