Analog Devices ADRV9001 User Manual page 13

Preliminary Technical Data
Dual-Band 2T2R FDD Overview
ADRV9001 transceiver with a minimum number of external components can be utilized to build complete dual-and RF-to-bits signal
chain that can serve as RF front end in small cell type applications. Note that in proposed solution, only one band can be utilized at the
time. ADRV9001 dual Rx and Tx signal chains enables user to implement MIMO or diversity in their system. ADRV9001 internal AGC
can be utilized to autonomously monitor and set appropriate gain level for Rx signal chains. For none time critical FDD type applications
control of the ADRV9001 TRx can be done thru API commands that utilize SPI interface.
Table 2. Constrains and Limitations in Dual-Band 2T2R FDD Type Small-Cell Application
Functionality Constrains and Limitations
Rx Signal Path User has to ensure that appropriate level of isolation between Rx1 and Rx2 as well as Rx to Tx is provided at system
level. In example above, RxB inputs are utilized to work with Rx Band B signals as well as during initialization
calibrations. In this scenario, RF Balun selected for RxB inputs must work with both Band B and Tx Bands. User should
ensure that appropriate attenuation is present in line to prevent Rx being overloaded by Tx signal.
Tx Signal Path User has to ensure that appropriate level of isolation between Tx1 and Tx2 as well as Rx to Tx is provided at system
level.
LO Generation In FDD type Small cell application, ADRV9001 can use its internal LO to generate RF LO1 for uplink (Rx1 and Rx2) and
RF LO2 for downlink (Tx1 and Tx2). It is also possible to use external LO inputs in this mode of operation. External LO1
operating at 2x RF LO can be used for uplink and External LO2 operating at 2x RF LO can be used for downlink. It
should be noted that only one set of Rx inputs can be used at the time. This system can operate with two different
FDD bands but only one of those bands can be active at particular moment in time.
RF Front End For LO generation, ADRV9001 utilize internal VCO that generates square wave type signal. A square wave LO would
produce harmonics. For example: depending of RF matching used on the RF ports user 2
high as -50dBc and 3
that signals at the LO harmonic frequencies (up to 9
DPD The DPD functionality is not available when ADRV9001 operates in 2R2T FDD mode.
Calibrations During Rx initialization sequence user needs to ensure that there are no signals at the Rx input (external LNA should
be disabled) and appropriate termination should be present at LNA output to avoid reflections of Rx calibration tones.
Maximum input signal amplitude should not exceed -82 dBm/MHz for wideband modes, TBD dBm/MHz for
narrowband modes. During the transmitter initialization sequence, the user needs to ensure that the power amplifier
is powered down to avoid unwanted emission of transmitter calibration tones at the antenna. No transmitter tracking
calibrations are available when ADRV9001 operates in 2R2T FDD mode.
AGPIOs Analog GPIOs (operating at 1.8V level) can be used as read or write digital levels of in the end user system. AGPIOs can
be utilized to control states of external components or read back digital logic levels from external components.
DGPIOs Digital GPIOs can be used to perform real time monitoring of states of internal ADRV9001 blocks. Digital GPIOs
operating as inputs can allow user to control Rx gain, Tx attenuation, AGC operation and other elements of ADRV9001
TRx. Depending on the ADRV9001 operation up to 4 GPIOs may be utilized by data port interface.
AuxADC AuxADC can be used to monitor analog voltage (e.g. temperature sensor). Maximum AuxADC input voltage can not
exceed 0.9V.
AuxDAC AuxDAC can be used to: control VCXO responsible for generating ADRV9001 Device clock, control any circuitry that
requires analog control voltage up to 1.8V.
ADRV9001 provides divided down version of DEV_CLK reference clock input signal on the DEV_CLK_OUT output. This
DEV_CLK_OUT
output is intended to provide reference clock signal to the digital components in the overall system. This output can
be configured to be active after power up and before ADRV9001 configuration stage.
Multichip Sync If there is no need for multichip synchronization, ADRV9001 can be initialized using API functions only.
harmonic can be as high as -9 dBc. Therefore the RF filtering on the Rx and Tx path must ensure
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th in some cases) are not affecting overall system performance.
UG-1828
nd LO harmonic can be as