Impedance Matching Network Examples; Receiver Rf Port Impedance Matching Network - Analog Devices ADRV9001 User Manual

UG-1828 Preliminary Technical Data
Additionally, ADRV9001 provides built-in TX power ramp-up pattern generator to bring transmit power level in a pre-determined way
to protect internal devices from sudden voltage spikes which may happen due to in-rush current passing through an external DC bias
choke inductor. The supply side of choke inductors should also be tied to a capacitor with its self-resonant frequency higher that TX
frequency. When both TX channel are active, each TX outputs should be tied to its own supply plane via a bias chock inductor or ferrite
bead to reduce coupling between two TXs through the same supply feedline.

IMPEDANCE MATCHING NETWORK EXAMPLES

Impedance matching networks are required to achieve performance levels noted on the datasheet. This section provides example
topologies and components used on the evaluation Board. The impedance matching networks provided in this section have not been
evaluated in terms of Mean Time to Failure (MTTF) in high volume production. Please consult with component vendors for long-term
reliability concerns. Additionally, please consult with balun vendors to determine appropriate conditions for DC biasing.
The schematics in Figure 173, Figure 174, and Figure 175 show two or three circuit elements in parallel marked DNI (Do Not Include).
This was done on the evaluation board schematic to accommodate different component configurations for different frequency ranges.
Only one set of SMD component pads are placed on the board to provide a physical location that can be used for the selected parallel
circuit element. For example, R216, L216, and C216 components only have one set of SMD pads for one SMD component. The
schematic shows that in a generic port impedance matching network, the series elements may be either a resistor, inductor or a capacitor
whereas the shunt elements may be either an inductor or a capacitor. Only one component of each parallel combination is placed in a
practical application. Note that in some matching circuits, some shunt elements may not be required. All components for a given
physical location remain DNI in those particular applications.

RECEIVER RF PORT IMPEDANCE MATCHING NETWORK

RX1A± and RX2A± Impedance Matching Network
The ADRV9001 evaluation board utilizes both the top and bottom layers of the PCB evaluation platform to accommodate two balun
footprints. The 0805 footprint accommodates the high frequency narrowband baluns while the backside accommodates the larger
DB1627 case style transformer.
The PCB traces of the evaluation board were included in the simulation when designing the impedance match. Table 83 provides
impedance matching networks specific to the ADRV9001 evaluation board. The component values apply to RX1A± and RX2A±.
RX1B± and RX2B± Impedance Matching Network
Both the RXA and RXB paths share the same input S-parameters. However, given the ball locations of the RXB paths being in an inner
row and column and the layout of both paths are slightly different, the RXB path will have its own distinct impedance matching network
that will be different from the RXA path. On the RXB path the low frequency DB1627 case style transformer is located on the top side of
evaluation platform and the high frequency 0805 footprint transformer is located on the bottom of the board. This configuration is
opposite of the RXA path. This was done to minimize coupling of the receive paths.
The PCB traces of the evaluation board were included in the simulation when designing the impedance match. Table 83 provides
impedance matching networks specific to the ADRV9001 evaluation board. The component values applies to RX1B± and RX2B±.
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