Adrv9001 Example Use Cases - Analog Devices ADRV9001 User Manual

UG-1828

ADRV9001 EXAMPLE USE CASES

Intention of this section is to provide reader with overall idea how ADRV9001 integrated transceiver can operate as RF Front End in
different applications. Provided list is not exhaustive and there are other aplications where ADRV9001 can serve.
Each example is accompanied with table that explains main limitations and highlights what customer should look for when
implementing ADRV9001 in their end application.
ANTENNA A
A
DUPLEXER
B
ANTENNA B
A
DUPLEXER
B
RF I/O FUNCTIONALITY
Rx1A RF RECEPTION (DIVERSITY/MIMO)
Rx1B USED BY Tx1 INIT CALIBRATIONS
Rx2A RF RECEPTION (DIVERSITY/MIMO)
Rx2B USED BY Tx2 INIT CALIBRATIONS
Tx1 RF TRANSMISSION (DIVERSITY/MIMO)
Tx2 RF TRANSMISSION (DIVERSITY/MIMO)
Table 1. Constrains and Limitations in Single-Band 2T2R FDD Type Small-Cell Application
Functionality Constrains and Limitations
Receiver Signal User has to ensure that appropriate level of isolation between Rx1 and Rx2 as well as Rx to Tx is provided at system
Path level. In example above, RxB inputs are utilized only during initialization calibrations. User should ensure that
appropriate attenuation is present in line to prevent Rx being overloaded by Tx signal.
Transmistter Signal User has to ensure that appropriate level of isolation between Tx1 and Tx2 as well as Rx to Tx is provided at system
Path level.
LO Generation In FDD type Small Cell application, ADRV9001 can use its internal LO to generate RF LO1 for uplink (Rx1 and Rx2) and
RF LO2 for downlink (Tx1 and Tx2). It is also possible to use external LO inputs in this mode of operation. External LO1
operating at 2x RF LO can be used for uplink and External LO2 operating at 2x RF LO can be used for downlink.
PA
VGA
LPF
BPF FILTER
LNA
ATTENUATOR
BPF FILTER
LNA
ATTENUATOR
PA
LPF
VGA
Figure 3. ADRV9001 in Single-Band 2T2R FDD Type Small Cell Application
Rev. PrA | Page 10 of 253
BALUN Tx1
COUPLER
BALUN
Rx1A
BALUN
Rx1B
BALUN
EXT LO1
/2
RF PLL1
BALUN EXT LO2
/2
RF PLL2
BALUN
Rx2A
BALUN
Rx2B
COUPLER
BALUN
Tx2
AGPIOs AuxADC
Preliminary Technical Data
POWER IC
ADRV9001
Tx1
DATA
3/4/6/7/8/10
INT
QEC SSI
DAC
LOL
Rx1
DDC DATA
3/6/8
DEC
SSI
ADC
QEC
DC
12/16
DGPIOs
4
Rx/Tx_ENABLE
GP_INT
3/4
SPI
RESET
Rx2
DDC DATA
3/6/8
DEC
SSI
ADC
QEC
DC
Tx2
DATA
3/4/6/7/8/10
INT
SSI
DAC QEC
LOL
DEV_CLKL_OUT
MCS
BALUN
DEV_CLK
AuxDAC
FPGA
OR
BBP
VCXO