Analog Devices ADRV9001 User Manual page 24

UG-1828
ANTENNA A
A
DUPLEXER
B
ANTENNA B
A
DUPLEXER
B
RF I/O FUNCTIONALITY
Rx1A RECEPTION OF RF BAND A
Rx1B USED BY Tx1 INIT CALIBRATIONS
Rx2A RECEPTION OF RF BAND B
Rx2B USED BY Tx2 INIT CALIBRATIONS
Tx1 TRANSMISSION OF RF BAND A
Tx2 TRANSMISSION OF RF BAND B
Figure 10. ADRV9001 in FDD Type Repeater Application Without Baseband Processor Analyzing Traffic Data
FDD Type Repeater Without Baseband Processor Overview
ADRV9001 transceiver with minimum number of external components can be utilized to build complete RF-to-RF signal chain that can
serve as repeater or frequency translator. ADRV9001 internal AGC can be utilized to autonomously monitor and set appropriate gain
level for Rx signal chains. For none time critical FDD type applications control of the ADRV9001 TRx can be done thru API commands
that utilize SPI interface. Support of external crystal enables very compact solution where ADRV9001 provides clock for microprocessor
that programs and monitors ADRV9001 operation.
Table 8. Constrains and Limitations in FDD Type Repeater Application Without Baseband Processor Analyzing Traffic Data
Functionality Constrains and Limitations
Rx Signal Path User has to ensure that appropriate level of isolation between Rx1 and Rx2 as well as Rx to Tx is provided at system
level. In example above, RxB inputs are utilized only during initialization calibrations. User should ensure that
appropriate attenuation is present in line to prevent Rx being overloaded by Tx signal.
Tx Signal Path User has to ensure that appropriate level of isolation between Tx1 and Tx2 as well as Rx to Tx is provided at system
level.
LO Generation In FDD type Repeater application, ADRV9001 can use its internal LO to generate RF LO1 for uplink (example: Tx1 and
Rx1) and RF LO2 for downlink (example: Tx2 and Rx2). It is also possible to use external LO inputs in this mode of
operation. External LO1 operating at 2x RF LO can be used for uplink and External LO2 operating at 2x RF LO can be
used for downlink.
PA
VGA
LPF
BPF FILTER
LNA
ATTENUATOR
BPF FILTER
LNA
ATTENUATOR
PA
LPF
VGA
Rev. PrA | Page 24 of 253
BALUN Tx1
COUPLER
BALUN
Rx1A
BALUN
Rx1B
BALUN EXT LO1
/2
RF PLL1
BALUN
EXT LO2
/2
RF PLL2
BALUN
Rx2A
BALUN
Rx2B
COUPLER
BALUN
Tx2
AGPIOs AuxADC
Preliminary Technical Data
POWER IC
ADRV9001
Tx1
DATA
INT
SSI
DAC QEC
LOL
Rx1
DDC DATA
DEC
ADC SSI
QEC
DC
DGPIOs
Rx/Tx_ENABLE
GP_INT
3/4
SPI
RESET
Rx2
DDC DATA
DEC
ADC SSI
QEC
DC
Tx2
DATA
INT
QEC SSI
DAC
LOL
DEV_CLKL_OUT
MCS
DEV_CLK
AuxDAC
µC