Analog Devices ADRV9001 User Manual page 252

UG-1828
2. If the cable is properly connected, then check if Windows OS is able to communicate over the Ethernet port with the ZYNQ
platform. Check if the IP number and open ports for the Ethernet connection used to communicate with the ZYNQ platform follow
advice described in the Hardware Operation section.
a. Run cmd.exe and then type: ping 192.168.1.10. The user should be able to see a reply from the ZYNQ platform. If no reply is
received, connection with the ZYNQ platform needs to be re-examined.
b. If connection with the ZYNQ platform is established but TTES still reports that hardware is not available, ensure that ports
number 22 (SSH) and 55557 (Evaluation Software) are not blocked by firewall software on the Ethernet connection used to
communicate with the ZYNQ platform. Both ports are required to be open for normal operation.
3. Check for physical damage to the EVB.
a. Look for ferrite bead E803 located on the TOP side of PCB, next to mounting hole. There is a possibility that during transit or
when in use nut used to keep PCB stand in place damaged E803. Ensure that E803 is in place with good connection. If E803 got
broken, replace it with BLM41PG600SN1L from Murata or similar.
Orange LED Blinks Constantly
1. The ZYNQ ZC706 generated power domain for IOs that control ADRV9001 over FMC interface. That power domain is called
VADJ. For proper operation voltage on that power domain should not exceed 1.89V. The SD card provided together with an
evaluation card ensures that VADJ is properly set.
On an Evaluation Card, there is an orange LED installed close to the FMC connector. Role of this LED is to indicate if VADJ voltage
exceeded 2.0V level. If that was the case this LED will be ON
a. If LED is ON when EVB system is powered up, this indicates that VADJ exceeded 2.0V and there is a possibility that pins that
connects ADRV9002
operation that might decrease life time of
2. Chip might still operate correctly but user should understand that VADJ exceeded recommended level. The only way to remove
uncertainty here is to change
Init Calibration Fail
User may experience program failure due to init calibration. This is usually caused by Rx input is connected to the signal generator and
RF output is ON. This causes
programming.
to the FPGA IOs over FMC connector were exposed to voltage higher than 2.0V. This is an abnormal
ADRV9002
ADRV9002 on an evaluation board to the new one.
ADRV9002 to interfere with its own internal Rx calibration. User should turn off RF signal during
or in worst case scenario damage the IC.
Rev. PrA | Page 252 of 253
Preliminary Technical Data