Adrv9001 In Tdd Type Repeater Application - Analog Devices ADRV9001 User Manual

UG-1828

ADRV9001 IN TDD TYPE REPEATER APPLICATION

ANTENNA A
COUPLER
CIRCULATOR
ATTENUATOR
ANTENNA B
CIRCULATOR
ATTENUATOR
RF I/O FUNCTIONALITY
Rx1A RECEPTION FROM ANTENNA A
Rx1B USED BY Tx1 DPD AND CALIBRATIONS
Rx2A RECEPTION FROM ANTENNA B
Rx2B USED BY Tx2 DPD AND CALIBRATIONS
Tx1 TRANSMISSION ON ANTENNA A
Tx2 TRANSMISSION ON ANTENNA B
Figure 11. ADRV9001 in TDD Type Repeater Application with Baseband Processor Analyzing Traffic Data
TDD Type Repeater Overview
ADRV9001 transceiver with minimum number of external components can be utilized to build complete RF-to-bits signal chain that can
serve as RF front end in TDD type repeater or frequency translator applications. In TDD type applications internal DPD block can be
utilized to linearize external power amplifier and improve overall system efficiency. ADRV9001 internal AGC can be utilized to
autonomously monitor and set appropriate gain level for Rx signal chains. FPGA or baseband processor is responsible for appropriate
time alignment of Rx and Tx time slots. Control of the ADRV9001 Rx and Tx signal chains can be done by toggling control lines.
ADRV9001 can provide power amplifier bias voltage by utilizing AuxDAC outputs.
PA
LPF
LNA BPF FILTER
BPF FILTER
LNA
PA
LPF
COUPLER
VGA
BALUN Tx1
BALUN
Rx1A
BALUN
Rx1B
BALUN
EXT LO1
/2
RF PLL1
BALUN EXT LO2
/2
RF PLL2
BALUN
Rx2A
BALUN
Rx2B
VGA
BALUN Tx2
AGPIOs
Rev. PrA | Page 26 of 253
Preliminary Technical Data
POWER IC
ADRV9001
Tx1
DATA
3/4/6/7/8/10
INT
DAC QEC SSI
LOL
Rx1
DDC DATA
3/6/8
DEC
SSI
ADC
QEC
DC
12/16
DGPIOs
4
Rx/Tx_ENABLE
GP_INT
3/4
SPI
RESET
Rx2
DDC DATA
3/6/8
DEC
SSI
ADC
QEC
DC
Tx2
DATA
3/4/6/7/8/10
INT
SSI
DAC QEC
LOL
DEV_CLKL_OUT
MCS
BALUN
DEV_CLK
AuxADC AuxDAC
FPGA
OR
BBIC
VCXO