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CHAPTER 5 INTERRUPT CONTROLLER
■ NMI (Non Maskable Interrupt)
NMIs have the highest priority among the interrupt sources handled by this module.
An NMI is therefore always selected even whenever it is generated at the same time as another interrupt
source.
●
When an NMI occurs, the interrupt controller passes the following items of information to the CPU:
Interrupt level
Interrupt number: 15 (0001111
●
NMI detection
NMIs are set and detected by the external interrupt/NMI controller module. This module only generates an
interrupt level, interrupt number, and MHALTI in response to an NMI request.
●
Suppressing DMA transfer upon NMI request
When an NMI request occurs, the MHALTI bit in the HRCL register is set to "1", suppressing DMA
transfer. To permit DMA transfer, clear the MHALTI bit to "0" at the end of the NMI routine.
■ Hold Request Cancel Request
When a high-priority interrupt needs to be serviced when the CPU has been put on hold (during DMA
transfer), it is necessary to request the hold request issuer to cancel the hold request. Use the HRCL
register to set the interrupt level as the reference level for generating the hold request cancel request.
●
Conditions for generating a hold request cancel request
A hold request cancel request is issued to the DMAC when an interrupt source of a higher interrupt level
than that set in the HRCL register occurs.
Interrupt level set in the HRCL register > Interrupt level after priority evaluation → Cancel request
generated
Interrupt level set in the HRCL register ≤ Interrupt level after priority evaluation → No cancel request
Once issued, the cancel request remains in effect until the interrupt source causing that request is cleared,
accordingly leaving DMA transfer prevented from being executed. Therefore, be sure to clear the relevant
interrupt source. When an NMI is used, the MHALTI bit in the HRCL register is "1" and thus the cancel
request is in effect.
●
Interrupt levels available
The HRCL register accepts a value from "10000
If the HRCL register is set to "11111
to "10000
Table 5.3-2 lists the interrupt levels for which a hold request cancel request is generated.
124
: 15 (01111
)
B
)
B
", a cancel request is generated for NMIs only.
B
" to "11111
" like the ICR register.
B
B
", a cancel request is generated for every level of interrupt. If it is set
B
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