Fujitsu MB91260B Series Hardware Manual page 11

CHAPTER 5 INTERRUPT CONTROLLER ................................................................... 113
5.1 Overview ......................................................................................................................................... 114
5.2 Interrupt Control Registers .............................................................................................................. 118
5.3 Operation of Interrupt Controller ..................................................................................................... 120
CHAPTER 6 EXTERNAL INTERRUPT AND NMI CONTROLLER ............................... 129
6.1 Overview of External Interrupt/NMI Controller ................................................................................ 130
6.2 Registers of External Interrupt/NMI Controller ................................................................................ 132
6.3 Operation of External Interrupt/NMI Controller ............................................................................... 134
CHAPTER 7 REALOS-RELATED HARDWARE .......................................................... 141
7.1 Delayed Interrupt Module ............................................................................................................... 142
7.2 Register of Delayed Interrupt Module ............................................................................................. 143
7.3 Operation of Delayed Interrupt Module ........................................................................................... 144
7.4 Bit Search Module .......................................................................................................................... 145
7.5 Register of Bit Search Module ........................................................................................................ 146
7.6 Operation of Bit Search Module ...................................................................................................... 148
CHAPTER 8 16-BIT RELOAD TIMER ........................................................................... 151
8.1 Overview ......................................................................................................................................... 152
8.2 16-bit Reload Timer Block Diagram ................................................................................................ 153
8.3 16-bit Reload Timer Registers ........................................................................................................ 154
8.4 Operation of 16-bit Reload Timer ................................................................................................... 158
CHAPTER 9 PPG (Programmable Pulse Generator) ................................................. 163
9.1 Overview ......................................................................................................................................... 164
9.2 Block Diagram ................................................................................................................................ 168
9.3 Register of PPG .............................................................................................................................. 172
9.4 Operation Explanation .................................................................................................................... 177
CHAPTER 10 PWC (Pulse Width Count: Pulse Width Measurement) ....................... 183
10.1 Overview ......................................................................................................................................... 184
10.2 Block Diagram ................................................................................................................................ 185
10.3 Register of PWC ............................................................................................................................. 186
10.4 Operation Explanation .................................................................................................................... 192
CHAPTER 11 MULTIFUNCTIONAL TIMER ................................................................... 203
11.1 Overview ......................................................................................................................................... 204
11.2 Block Diagram ................................................................................................................................ 206
11.3 Pins of Multifunctional Timer ........................................................................................................... 212
11.4 Multifunctional Timer Register ........................................................................................................ 213
11.4.1 Compare Clear Buffer Register (CPCLRBH, CPCLRBL) /Compare Clear Register (CPCLRH,
CPCLRL) 218
11.4.2 Timer Data Register (TCDTH, TCDTL) ..................................................................................... 220
11.4.3 Timer State Control Register (TCCSH, TCCSL) ....................................................................... 221
11.4.4 A/D Trigger Control Register (ADTRGC) ................................................................................... 226
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