Fujitsu MB91260B Series Hardware Manual page 310

; --------------- Vector Settings----------------------------------------------------
VECT
■ Program Example of 16-bit Output Compare
●
Processing contents
• When the 16-bit free-run timer count value matches the output compare value, an output compare match
is generated.
• Use when the 16-bit free-run timer is in up/down count mode.
• 16 MHz is for the machine clock, and 62.5 ms is for the 16-bit free-run timer 0 count clock.
●
Coding example
ICR44
TCCSH
CPCLRBHEQU
OCCPBH0EQU
OCCPBH1EQU
OCSH1
; --------------- Main Program ----------------------------------------------
START:
;
RETI
.ORG FFFF8H
.DATA.W WARI
.ORG FFFF8H
.DATA.W 0x07000000 ; Set single-chip mode.
.DATA.W START
.END
EQU 00046CH
EQU 0000A8H
0000A4H
000090H
000092H
EQU 00009CH
:
ANDCCR #0EFH
LDI #ICR44,r0
LDI #00H,r1
STB r1,@r0
LDI #CPCLRBH,r0
LDI #0FFFFH,r1
STH r1,@r0
LDI #OCCPBH0,r0
LDI #0BFFFH,r1
STH r1,@r0
LDI #OCCPBH1,r0
LDI #07FFFH,r1
STH r1,@r0
LDI #OCSH1,r3
LDI #6C33H,r2
STH r2,@r3
LDI #TCCSH,r0
CHAPTER 11 MULTIFUNCTIONAL TIMER
: Returns from interrupt.
; Set interrupt routine.
; Set reset vectors.
; Output compare 0/1 interrupt register
; Timer control status register
; Compare-clear buffer register
; Output compare buffer register 0
; Output compare buffer register 1
; Compare control register
; Assumes that the stack pointer (SP) has already been
initialized.
; Disables the interrupt.
; Interrupt levels 16 (strength)
; Set to 16-bit free-run timer's compare-clear
; buffer register
; Set the output compare register 0.
; Set the output compare register 1.
; Enable output compare output.
; Enable compare match interrupts 0/1.
; Clear the interrupt flag bit.
; Up count down mode,
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