Fujitsu MB91260B Series Hardware Manual page 234

■ Compare Clear Register (CPCLRH, CPCLRL)
Compare clear register (Upper)
CPCLRH
Address: 0000A4
Compare clear register (Lower)
CPCLRL
Address: 0000A5
The compare clear register is used to compare with the count value of the 16-bit free-run timer. In the up
count mode, the 16-bit free-run timer is reset to "0000
the 16-bit free-run timer. In up/down count mode, the 16-bit free-run timer changes its mode from the up
counting to the down counting when this register matches the count value of the 16-bit free-run timer; or
changes from the down counting to up counting when a zero detection occurs.
To access this register, use a halfword or word access instruction.
Bit15 Bit14
CL15 CL14
H
Read →
R R
Initial value →
(1) (1)
Bit7 Bit6
CL07 CL06
H
Read →
R R
Initial value →
(1) (1)
CHAPTER 11 MULTIFUNCTIONAL TIMER
Bit13 Bit12 Bit11
CL13 CL12 CL11
R R R
(1) (1) (1)
Bit5 Bit4 Bit3
CL05 CL04 CL03
R R R
(1) (1) (1)
" when this register matches with the count value of
H
Bit10 Bit9 Bit8
CL10 CL09 CL08
R R R
(1) (1) (1)
Bit2 Bit1 Bit0
CL02 CL01 CL00
R R R
(1) (1) (1)
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