16-Bit Dead Timer Register (Tmrrh0 To Tmrrh2, Tmrrl0 To Tmrrl2) - Fujitsu MB91260B Series Hardware Manual

CHAPTER 11 MULTIFUNCTIONAL TIMER
11.4.10 16-bit Dead Timer Register
(TMRRH0 to TMRRH2, TMRRL0 to TMRRL2)
The 16-bit dead timer register stores the compare value of the 16-bit dead timer.
■ 16-bit Dead Timer Register (TMRRH: TMRRH0 to TMRRH2, TMRRL: TMRRL0 to TMRRL2)
16-bit dead timer register (Upper)
TMRRH0 to TMRRH2
Address:
0000BC
H
0000BE
Read/Write →
H
0000C0
Initial value →
H
16-bit dead timer register (Lower)
TMRRL0 to TMRRL2
Read/Write →
Initial value →
These registers are used to store the compare value of the 16-bit dead timer.
These register values are reloaded when the 16-bit dead timer starts the operation.
If the values are rewritten to these registers during the timer operation, these new values are enabled in the
next timer start/operation.
To access these registers, use a halfword or word access instruction.
In the dead time timer mode, these registers are used to set the non-overlap time.
Non-overlap time = (Setting value) × Selected clock
In the timer mode, these registers are used to set the GATE time of the PPG0 timer operation.
GATE time = (Setting value) × Selected clock
Note:
In the dead time timer mode and the time timer mode, "0000
244
Bit15 Bit14 Bit13
TR15 TR14 TR13
R/W R/W R/W
(X) (X) (X)
Bit7 Bit6 Bit5
TR07 TR06 TR05
R/W R/W R/W
(X) (X) (X)
Bit12 Bit11 Bit10
TR12 TR11 TR10
R/W R/W R/W
(X) (X) (X)
Bit4 Bit3 Bit2
TR04 TR03 TR02
R/W R/W R/W
(X) (X) (X)
" cannot be set to these registers.
H
Bit9 Bit8
TR09 TR08
R/W R/W
(X) (X)
Bit1 Bit0
TR01 TR00
R/W R/W
(X) (X)