Multi-Eit Servicing - Fujitsu MB91260B Series Hardware Manual

32-bit microcontroller
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CHAPTER 3 CPU AND CONTROL UNITS
3.8.5

Multi-EIT Servicing

If two or more EIT sources occur simultaneously, the CPU selects and receives
one EIT source, executes the EIT sequence, then detects another EIT source,
repeatedly.
If there is no more EIT source detected to be received, the CPU executes the
instruction of the handler for the EIT source received last.
When two or more EIT sources occur simultaneously, therefore, the execution
order of their respective handlers is determined by the following two elements:
• Reception priority of EIT source
• Masking of other sources after reception
■ Reception Priority of EIT Source
The reception priority of EIT source determines the order in which EIT sources are selected for
executing the EIT sequence where the PS and PC values are saved, the PC is updated, and
other sources are masked (as required).
The handlers of EIT sources received earlier are not always executed earlier on a first-in first-
out basis.
Table 3.8-4 lists the reception priorities of EIT sources along with the masking levels of other
sources.
Table 3.8-4 Reception Priorities of EIT Sources and the Masking of Other Sources
Reception priority
1
2
3
4
5
6
7
8
9
Considering the masking of other sources after an EIT source is received, the handlers for the
simultaneously generated EIT sources are executed in the order shown in Table 3.8-5.
56
Source
Reset
Undefined instruction exception
INTE instruction
INT instruction
Coprocessor absence trap
Coprocessor error trap
User interrupt
NMI (for user)
NMI (for emulator)
Step trace trap
Masking of other sources
Discard other sources
Cancel
ILM=4
Discard other sources
I-flag = 0
ILM = Level of received source
ILM=15
ILM=4
ILM=4

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