Fujitsu MB91260B Series Hardware Manual page 412

■ Channel Selection and Control
Up to 5 channels can be simultaneously set as transfer channels. In general, an independent function can be
set for each channel.
●
Priority level for channels
Since DMA transfer is possible only on 1 channel at a time, priority must be set for the channels.
Two modes, fixed and rotation, are provided as the priority settings and can be selected for each channel
group (described later).
(1) Fixed mode
The priority is fixed by channel number in ascending order.
(ch.0 > ch.1 > ch.2 > ch.3 > ch.4)
If a transfer request with a higher priority is received during a transfer, the transfer channel becomes the
channel with the higher priority when the transfer for the transfer unit (number set in the block size
specification register x data width) ends.
When higher priority transfer is completed, transfer is restarted on the previous channel.
ch0 transfer request
ch1 transfer request
Bus operation
Transfer channel
ch0 transfer end
ch1 transfer end
(2) Rotation mode (between ch.0 and ch.1 only)
When operation is enabled, the initial states have the same order that they would have in fixed mode,
but at the end of each transfer operation, the priority of the channels is reversed. Thus, if more than one
transfer request is outputted at the same time, the channel is switched after each transfer unit.
This mode is effective when continuous or burst transfer is set.
ch0 transfer request
ch1 transfer request
Bus operation
Transfer channel
ch0 transfer end
ch1 transfer end
●
Channel group
Set the selection priority as explained in the table below.
Mode
Fixed
Rotation
CPU SA DA
ch.1
CPU SA DA
ch.1
Priority
ch.0>ch.1
ch.0>ch.1 The initial states have the upper order.
↑ ↓
When the upper part is transferred, it is reversed.
ch.0<ch.1
CHAPTER 16 DMAC (DMA Controller)
SA DA SA DA SA
ch.0 ch.0 ch.1
SA DA SA DA SA
ch.0 ch.1 ch.0
Remark
DA CPU
DA CPU
397