Renesas H8/36912 Series User Manual page 98

Bit Bit Name
5 OSCBAKE 0
4 OSCSEL
3 CKSWIE
2 CKSWIF
Rev. 1.00, 11/03, page 70 of 376
Downloaded from Elcodis.com electronic components distributor
Initial
Value R/W Description
R/W External Clock Backup Enable
0: External clock backup disabled
1: External clock backup enabled
The detection circuit for the external clock is enabled
when this bit is 1. When the external clock halt is detected
while this LSI operates on the external clock, the system
clock source is automatically switched to the internal RC
oscillator regardless of the value of bit 4 in this register.
Usage Note: The detection circuit for the external clock
operates on the internal RC clock. When this bit is set to
1, do not set the internal RC oscillator to the standby state
by the RCSTP bit in RCCR.
0 R/W LSI Operation Clock Select
• When OSCBAKE = 0
This bit forcibly selects the system clock of this LSI.
0: Selects the internal RC clock as the system clock.
1: Selects the external clock as the system clock.
• When OSCBAKE = 1
This bit switches the internal RC clock to the external
clock. When this LSI operates on the internal RC clock,
setting this bit to 1 switches the system clock to the
external clock.
[Setting condition]
•
When 1 is written to this bit while the CKSWIF bit is 0.
[Clearing conditions]
•
When 0 is written to this bit
•
When the external clock halt is detected while
OSCBAKE = 1
0 R/W Clock Switch Interrupt Enable
Setting this bit to 1 enables the clock switch interrupt
request.
0 R/W Clock Switch Interrupt Request Flag
[Setting condition]
When the external clock is switched to the internal RC
clock
[Clearing condition]
When writing 0 after reading 1