SCL
(Master output)
SDA
(Master output)
SCL
(Slave output)
SDA
(Slave output)
RDRF
ICDRS
ICDRR
User
processing
SCL
(Master output)
SDA
(Master output)
SCL
(Slave output)
SDA
(Slave output)
RDRF
ICDRS
ICDRR
User
processing
Downloaded from
Elcodis.com
electronic components distributor
9
1
2
Bit 7
Bit 6
A
Data 1
[2] Read ICDRR (dummy read)
Figure 15.11 Slave Receive Mode Operation Timing (1)
9
1
2
3
Bit 7
Bit 6
Bit 5
A
Data 1
Figure 15.12 Slave Receive Mode Operation Timing (2)
3
4
5
6
Bit 5
Bit 4
Bit 3
Bit 2
4
5
6
7
Bit 4
Bit 3
Bit 2
Bit 1
[3] Set ACKBT
Rev. 1.00, 11/03, page 245 of 376
7
8
9
1
Bit 1
Bit 0
Bit 7
A
Data 2
Data 1
[2] Read ICDRR
8
9
Bit 0
A
Data 2
Data 1
[3] Read ICDRR [4] Read ICDRR