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14.6.1
Multiprocessor Serial Data Transmission
Figure 14.17 shows a sample flowchart for multiprocessor serial data transmission. For an ID
transmission cycle, set the MPBT bit in SSR to 1 before transmission. For a data transmission
cycle, clear the MPBT bit in SSR to 0 before transmission. All other SCI3 operations are the same
as those in asynchronous mode.
[1]
[2]
[3]
Figure 14.17 Sample Multiprocessor Serial Transmission Flowchart
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Start transmission
Read TDRE flag in SSR
TDRE = 1
Yes
Set MPBT bit in SSR
Write transmit data to TDR
All data transmitted?
No
Read TEND flag in SSR
TEND = 1
Yes
Break output?
Yes
Clear PDR to 0 and set PCR to 1
Clear TE bit in SCR3 to 0
<End>
[1]
Read SSR and check that the TDRE
flag is set to 1, set the MPBT bit in
SSR to 0 or 1, then write transmit
data to TDR. When data is written to
TDR, the TDRE flag is automatically
No
cleared to 0.
[2]
To continue serial transmission, be
sure to read 1 from the TDRE flag to
confirm that writing is possible, then
write data to TDR. When data is
written to TDR, the TDRE flag is
automatically cleared to 0.
[3]
To output a break in serial
transmission, set the port PCR to 1,
clear PDR to 0, then clear the TE bit
in SCR3 to 0.
Yes
No
No
Rev. 1.00, 11/03, page 217 of 376
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